MEMS technology has numerous applications in both commercial and military electrical systems. MEMS switches, for instance, can be used in routing radio frequency and microwave frequency signals in high frequency circuits. Some advantages of MEMS switches used in this manner over other active devices such as field effect transistors (FETS) and positive intrinsic negative (PIN) diodes include lower signal loss, higher signal isolation, and lower power consumption for switch activation (In this regard see for example E. R. Brown, “RF-MEMS Switches for Reconfigurable Integrated Circuits,” IEEE Trans. On Microwave Theory and Techniques, Vol. 46, No. 11, November 1998, p. 1868–1880; J. Lee, et al. “Monolithic 2–18 GHz Low Loss, On-Chip Biased PIN Diode Switches,” IEEE Trans. On Microwave Theory and Techniques, Vol. 43, February 1995, p. 250–255; M. Shokrani and V. J. Kapoor, “InGaAs Microwave Switch Transistors for Phase Shifter Circuits,” IEEE Trans. On Microwave Theory and Techniques, Vol. 42, May 1994, p. 772–778.)
A MEMS package ideally should be economical in materials cost, space requirements, and incorporation technique. A MEMS packaging arrangement should protect the enclosed switch from structural damage and contaminants, allow handling, conform to the RF requirements of the host system, be low cost, and not impede the performance of the switch or circuit. Some estimates attribute more than 70% of overall device costs to packaging (See for example M. Madou, Fundamentals of Microfabrication, CRC Press, Boca Raton, Fla., 1997, p. 378).
Several approaches exist for packaging MEMS switches. The “chip-in-a-box” approach entails dicing of un-released switch wafers, die attachment, interconnection, switch release, and lid seal. This process requires die level handling and release of switches inside the packages. A second approach is a wafer bonding arrangement that requires a capping wafer and a bonding ring around the switch (see e.g., U.S. Pat. No. 6,452,238, J. W. Orcutt, et al., “MEMS Wafer Level Package,” Sep. 17, 2002). Bonding arrangements may incorporate solder, eutectic, and epoxy materials. These arrangements involve low temperature processes and may result in a high aspect ratio device due to the combined thickness of the switch and the capping wafer.
The on-wafer fabrication and packaging approach of the present invention encapsulates the switches during the fabrication process, thus eliminating die handling issues and bonding ring requirements. In principle, the encapsulation of the present invention is similar to transistor passivation and requires no additional footprint or special wafer handling. The present invention-encapsulated switches may be diced, integrated and packaged along with other circuits of the system. The encapsulation approach is scalable to any size wafer.
The U.S. Pat. No. 5,589,082 of Liwei Lin et al. discloses a MEMS device of the electromechanical filter type that appears of interest with respect to the present invention. In FIGS. 7Q, 7R and 7S of the Lin et al. patent there is shown a sequence of three fabrication views for a filter in which capping, releasing and sealing of the MEMS enclosure are accomplished. Although several aspects of this capping, releasing and sealing sequence may appear closely related to the present invention it is interesting to note distinctions in at least the fabrication materials used, the fabrication temperatures used and the ambient pressure established in the completed MEMS enclosure.
The U.S. Pat. No. 5,589,082 of Qing Ma et al. discloses an assemblage of semiconductor components into a solder-seal-ring-closed package. These components include film bulk acoustic resonators and MEMS switches. The emphasis of the Ma et al. disclosure centers around packaging semiconductor devices (referred to as microelectromechanical systems) by solder sealing two separate structures along a sealing ring extending around a cavity containing the microelectromechanical system. Ma et al. also teach use of surface mount techniques, including application of solder bumps to package the electrical components. Interconnection to the cavity is through via holes in the thinned Ma et al. wafer. The present invention however includes packaging of individual RF MEMS switches using a wafer scale approach built on surface micromachining procedures consistent with the fabrication of MEMS switches. No change in a normal fabrication technique is needed for the present invention. The present invention also does not require the use of vias or wafer thinning.